Technical Field
The present invention relates to semiconductor device fabrication, and more particularly to a simplified multi-threshold voltage scheme for fully depleted semiconductor-on-insulator MOSFETs.
Description of the Related Art
The threshold voltage for a field effect transistor (FET), for example a metal-oxide-semiconductor (MOSFET), is the gate voltage necessary to initiate conduction. Conventional approaches to offer multi-threshold voltage devices on fully depleted MOSFETs (metal-oxide-semiconductor field-effect transistor), such as ETSOIs (extremely thin semiconductor-on-insulator) or FinFETs (fin field effect transistors), are based on a combination of: gate length modulation, channel doping, work function adjustment and, in the case of thin BOX (buried oxide) FDSOI (fully depleted semiconductor-on-insulator) devices, a backbias or backgate doping. However, each of these approaches has drawbacks. For example, gate length modulation offers a maximum of about 50 mV of threshold voltage modulation for typical device dimensions, since lithography techniques to define different gate lengths limit the device pitch. Channel doping leads to random dopant fluctuation. Work function adjustment requires multiple gate stacks to be integrated, which in practice is very challenging. Backbias and/or backgate doping offers a maximum of about 100 mV of threshold voltage modulation with typical BOX thicknesses of 20 nm or more and is not useful for FinFETs.